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ISCAS
2006
IEEE
140views Hardware» more  ISCAS 2006»
15 years 7 months ago
Multilevel flash memory on-chip error correction based on trellis coded modulation
This paper presents a multilevel (ML) Flash memory onchip error correction system design based on the concept of trellis coded modulation (TCM). This is motivated by the non-trivi...
Fei Sun, Siddharth Devarajan, Kenneth Rose, Tong Z...
134
Voted
SBACPAD
2003
IEEE
137views Hardware» more  SBACPAD 2003»
15 years 7 months ago
Exploring Memory Hierarchy with ArchC
This paper presents the cache configuration exploration of a programmable system, in order to find the best matching between the architecture and a given application. Here, prog...
Pablo Viana, Edna Barros, Sandro Rigo, Rodolfo Aze...
EUROMICRO
2000
IEEE
15 years 6 months ago
Task Assignment and Scheduling under Memory Constraints
Many DSP and image processing embedded systems have hard memory constraints which makes it difficult to find a good task assignment and scheduling which fulfill these constrain...
Radoslaw Szymanek, Krzysztof Kuchcinski
127
Voted
HPDC
1998
IEEE
15 years 6 months ago
Strings: A High-Performance Distributed Shared Memory for Symmetrical Multiprocessor Clusters
This paper introduces Strings, a high performance distributed shared memory system designed for clusters of symmetrical multiprocessors (SMPs). The distinguishing feature of this ...
Sumit Roy, Vipin Chaudhary
IJCAI
2003
15 years 3 months ago
Collaborative Filtering Using Associative Neural Memory
There are two types of collaborative filtering (CF) systems, user-based and item-based. This paper introduces an item-based CF system for ranking derived from Linear Associative ...
Chuck P. Lam