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IPPS
2010
IEEE
14 years 11 months ago
Efficient hardware support for the Partitioned Global Address Space
We present a novel architecture of a communication engine for non-coherent distributed shared memory systems. The shared memory is composed by a set of nodes exporting their memory...
Holger Fröning, Heiner Litz
HPCA
2011
IEEE
14 years 5 months ago
Calvin: Deterministic or not? Free will to choose
Most shared memory systems maximize performance by unpredictably resolving memory races. Unpredictable memory races can lead to nondeterminism in parallel programs, which can suff...
Derek Hower, Polina Dudnik, Mark D. Hill, David A....
118
Voted
EUROSYS
2009
ACM
15 years 11 months ago
xCalls: safe I/O in memory transactions
Memory transactions, similar to database transactions, allow a programmer to focus on the logic of their program and let the system ensure that transactions are atomic and isolate...
Haris Volos, Andres Jaan Tack, Neelam Goyal, Micha...
147
Voted
MICRO
1999
IEEE
143views Hardware» more  MICRO 1999»
15 years 6 months ago
Code Transformations to Improve Memory Parallelism
Current microprocessors incorporate techniques to exploit instruction-level parallelism (ILP). However, previous work has shown that these ILP techniques are less effective in rem...
Vijay S. Pai, Sarita V. Adve
IPL
1998
80views more  IPL 1998»
15 years 1 months ago
The Economics of Large-Memory Computations
We propose, and justify, an economic theory to guide memory system design, operation, and analysis. Our theory treats memory random-access latency, and its cost per installed mega...
Clark D. Thomborson