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117
Voted
ICML
1997
IEEE
16 years 2 months ago
Predicting Multiprocessor Memory Access Patterns with Learning Models
Machine learning techniques are applicable to computer system optimization. We show that shared memory multiprocessors can successfully utilize machine learning algorithms for mem...
M. F. Sakr, Steven P. Levitan, Donald M. Chiarulli...
108
Voted
CC
2010
Springer
172views System Software» more  CC 2010»
15 years 8 months ago
Verifying Local Transformations on Relaxed Memory Models
The problem of locally transforming or translating programs without altering their semantics is central to the construction of correct compilers. For concurrent shared-memory progr...
Sebastian Burckhardt, Madanlal Musuvathi, Vasu Sin...
104
Voted
DATE
2008
IEEE
133views Hardware» more  DATE 2008»
15 years 8 months ago
Memory Organization with Multi-Pattern Parallel Accesses
We propose an interleaved memory organization supporting multi-pattern parallel accesses in twodimensional (2D) addressing space. Our proposal targets computing systems with high ...
Arseni Vitkovski, Georgi Kuzmanov, Georgi Gaydadji...
105
Voted
CC
2007
Springer
126views System Software» more  CC 2007»
15 years 8 months ago
An Array Allocation Scheme for Energy Reduction in Partitioned Memory Architectures
This paper presents a compiler technique that reduces the energy consumption of the memory subsystem, for an off-chip partitioned memory architecture having multiple memory banks ...
K. Shyam, R. Govindarajan
DATE
2010
IEEE
110views Hardware» more  DATE 2010»
15 years 7 months ago
An RDL-configurable 3D memory tier to replace on-chip SRAM
—In a conventional SoC designs, on-chip memories occupy more than the 50% of the total die area. 3D technology enables the distribution of logic and memories on separate stacked ...
Marco Facchini, Paul Marchal, Francky Catthoor, Wi...