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DATE
2010
IEEE
147views Hardware» more  DATE 2010»
15 years 4 months ago
Detecting/preventing information leakage on the memory bus due to malicious hardware
An increasing concern amongst designers and integrators of military and defense-related systems is the underlying security of the individual microprocessor components that make up ...
Abhishek Das, Gokhan Memik, Joseph Zambreno, Alok ...
COMPSEC
2008
116views more  COMPSEC 2008»
15 years 2 months ago
Enforcing memory policy specifications in reconfigurable hardware
While general-purpose processor based systems are built to enforce memory protection to prevent the unintended sharing of data between processes, current systems built around reco...
Ted Huffmire, Timothy Sherwood, Ryan Kastner, Timo...
IEEEHPCS
2010
14 years 12 months ago
Reducing memory requirements of stream programs by graph transformations
Stream languages explicitly describe fork-join parallelism and pipelines, offering a powerful programming model for many-core Multi-Processor Systems on Chip (MPSoC). In an embedd...
Pablo de Oliveira Castro, Stéphane Louise, ...
ECOOP
2007
Springer
15 years 8 months ago
Object-Relative Addressing: Compressed Pointers in 64-Bit Java Virtual Machines
64-bit address spaces come at the price of pointers requiring twice as much memory as 32-bit address spaces, resulting in increased memory usage. Increased memory usage is especia...
Kris Venstermans, Lieven Eeckhout, Koen De Bossche...
FMCAD
2000
Springer
15 years 5 months ago
Scalable Distributed On-the-Fly Symbolic Model Checking
Abstract. This paper presents a scalable method for parallel symbolic on-the-fly model checking in a distributed memory environment. Our method combines a scheme for on-the-fly mod...
Shoham Ben-David, Tamir Heyman, Orna Grumberg, Ass...