4747 search results - page 192 / 950 » Shuffle Memory System |
112
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ICCAD
2000
IEEE
15 years 6 months ago
2000
IEEE
We present an error catch and analysis (ECA) system for semiconductor memories. The system consists of a test algorithm generator called TAGS, a fault simulator called RAMSES, and...
124
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ISCA
2006
IEEE
15 years 1 months ago
2006
IEEE
The assumption of maximum parallelism support for the successful realization of scalable quantum computers has led to homogeneous, "sea-of-qubits" architectures. The res...
119
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CASES
2010
ACM
14 years 12 months ago
2010
ACM
We present a fine-grain dynamic instruction placement algorithm for small L0 scratch-pad memories (spms), whose unit of transfer can be an individual instruction. Our algorithm ca...
105
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CLOUDCOM
2010
Springer
14 years 12 months ago
2010
Springer
Checkpointing is a widely used mechanism for supporting fault tolerance, but notorious in its high-cost disk access. The idea of memory-based checkpointing has been extensively stu...
143
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LCTRTS
2010
Springer
14 years 12 months ago
2010
Springer
In this paper, we propose a hybrid-level flash translation layer (FTL) called RNFTL (Reuse-Aware NFTL) to improve the endurance and space utilization of NAND flash memory. Our bas...