4747 search results - page 219 / 950 » Shuffle Memory System |
139
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ICCAD
2009
IEEE
15 years 25 days ago
2009
IEEE
Present application specific embedded systems tend to choose instruction set extensions (ISEs) based on limitations imposed by the available data bandwidth to custom functional un...
110
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ISCA
2010
IEEE
15 years 7 months ago
2010
IEEE
As leakage and other charge storage limitations begin to impair the scalability of DRAM, non-volatile resistive memories are being developed as a potential replacement. Unfortunat...
114
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LCTRTS
2010
Springer
15 years 10 months ago
2010
Springer
Coarse Grain Reconfigurable Architectures (CGRAs) promise high performance at high power efficiency. They fulfil this promise by keeping the hardware extremely simple, and movi...
141
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MICRO
2009
IEEE
15 years 9 months ago
2009
IEEE
Modern DRAM systems rely on memory controllers that employ out-of-order scheduling to maximize row access locality and bank-level parallelism, which in turn maximizes DRAM bandwid...
128
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CHI
2002
ACM
16 years 3 months ago
2002
ACM
User interfaces can improve task performance by exploiting the powerful human capabilities for spatial cognition. This opportunity has been demonstrated by many prior experiments....