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133
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PPOPP
2003
ACM
15 years 9 months ago
User-controllable coherence for high performance shared memory multiprocessors
In programming high performance applications, shared address-space platforms are preferable for fine-grained computation, while distributed address-space platforms are more suita...
Collin McCurdy, Charles N. Fischer
PDP
2002
IEEE
15 years 9 months ago
A Parametrized Algorithm that Implements Sequential, Causal, and Cache Memory Consistency
In this paper we present an algorithm that can be used to implement sequential, causal, or cache consistency in distributed shared memory (DSM) systems. For this purpose it has a ...
Ernesto Jiménez, Antonio Fernández, ...
TC
2008
15 years 4 months ago
Secure Memory Accesses on Networks-on-Chip
Security is gaining relevance in the development of embedded devices. Toward a secure system at each level of design, this paper addresses security aspects related to Network-on-Ch...
Leandro Fiorin, Gianluca Palermo, Slobodan Lukovic...
177
Voted
ALIFE
1999
15 years 3 months ago
An Approach to Biological Computation: Unicellular Core-Memory Creatures Evolved Using Genetic Algorithms
A novel machine language genetic programming system that uses one-dimensional core memories is proposed and simulated. The core is compared to a biochemical reaction space, and in ...
Hikeaki Suzuki
NETWORK
2007
145views more  NETWORK 2007»
15 years 3 months ago
Analysis of Shared Memory Priority Queues with Two Discard Levels
— Two rate SLAs become increasingly popular in today’s Internet, allowing a customer to save money by paying one price for committed traffic and a much lower price for additio...
Shlomi Bergida, Yuval Shavitt