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ICC
2007
IEEE
138views Communications» more  ICC 2007»
15 years 11 months ago
Scalable Router Memory Architecture Based on Inter-leaved DRAM: Analysis and Numerical Studies
1  Routers need buffers to store and forward packets, especially when there is network congestion. With current memory technology, neither the SRAM nor the DRAM alone is suitabl...
Feng Wang, Mounir Hamdi
146
Voted
CHES
2007
Springer
111views Cryptology» more  CHES 2007»
15 years 10 months ago
TEC-Tree: A Low-Cost, Parallelizable Tree for Efficient Defense Against Memory Replay Attacks
Replay attacks are often the most costly attacks to thwart when dealing with off-chip memory integrity. With a trusted System-on-Chip, the existing countermeasures against replay r...
Reouven Elbaz, David Champagne, Ruby B. Lee, Lione...
ASPLOS
2006
ACM
15 years 10 months ago
Recording shared memory dependencies using strata
Significant time is spent by companies trying to reproduce and fix bugs. BugNet and FDR are recent architecture proposals that provide architecture support for deterministic rep...
Satish Narayanasamy, Cristiano Pereira, Brad Calde...
CASES
2003
ACM
15 years 9 months ago
Polynomial-time algorithm for on-chip scratchpad memory partitioning
Focusing on embedded applications, scratchpad memories (SPMs) look like a best-compromise solution when taking into account performance, energy consumption and die area. The main ...
Federico Angiolini, Luca Benini, Alberto Caprara
ADC
2000
Springer
326views Database» more  ADC 2000»
15 years 9 months ago
T-Tree or B-Tree: Main Memory Database Index Structure Revisited
While the B-tree (or the B+ -tree) is the most popular index structure in disk-based relational database systems, the Ttree has been widely accepted as a promising index structure...
Hongjun Lu, Yuet Yeung Ng, Zengping Tian