4747 search results - page 284 / 950 » Shuffle Memory System |
149
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HIPEAC
2009
Springer
15 years 9 months ago
2009
Springer
Abstract. In transactional memory, aborted transactions reduce performance, and waste computing resources. Ideally, concurrent execution of transactions should be optimally ordered...
135
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IPPS
2000
IEEE
15 years 9 months ago
2000
IEEE
The Simultaneous Optical Multiprocessor Exchange Bus (SOME-Bus) is a low-latency, high-bandwidth interconnection network which directly links arbitrary pairs of processor nodes wit...
135
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WOSP
1998
ACM
15 years 8 months ago
1998
ACM
Increasingly, new applications are being built by composing existing software components rather than by coding a system from scratch. Using this approach, applications can be buil...
147
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MICRO
1997
IEEE
15 years 8 months ago
1997
IEEE
Most modern microprocessors employ one or two levels of on-chip caches in order to improve performance. These caches are typically implemented with static RAM cells and often occu...
134
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IPPS
1996
IEEE
15 years 8 months ago
1996
IEEE
We introduce dag consistency, a relaxed consistency model for distributed shared memory which is suitable for multithreaded programming. We have implemented dag consistency in sof...