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DATE
2009
IEEE
149views Hardware» more  DATE 2009»
15 years 11 months ago
An ILP formulation for task mapping and scheduling on multi-core architectures
Multi-core architectures are increasingly being adopted in the design of emerging complex embedded systems. Key issues of designing such systems are on-chip interconnects, memory a...
Ying Yi, Wei Han, Xin Zhao, Ahmet T. Erdogan, Tugh...
IPPS
2006
IEEE
15 years 11 months ago
Online strategies for high-performance power-aware thread execution on emerging multiprocessors
Granularity control is an effective means for trading power consumption with performance on dense shared memory multiprocessors, such as multi-SMT and multi-CMP systems. In this p...
Matthew Curtis-Maury, James Dzierwa, Christos D. A...
126
Voted
SCOPES
2005
Springer
15 years 10 months ago
The Bit-reversal SDRAM Address Mapping
The performance contributions of SDRAM address mapping techniques in the main memory of an embedded system are studied and examined. While spatial locality existing in the access ...
Jun Shao, Brian T. Davis
141
Voted
EUROPAR
2004
Springer
15 years 10 months ago
Exploiting Spatial Store Locality Through Permission Caching in Software DSMs
Abstract. Fine-grained software-based distributed shared memory (SWDSM) systems typically maintain coherence with in-line checking code at load and store operations to shared memor...
Håkan Zeffer, Zoran Radovic, Oskar Grenholm,...
SIGCOMM
1996
ACM
15 years 9 months ago
Speeding up Protocols for Small Messages
Many techniques have been discovered to improve performance of bulk data transfer protocols which use large messages. This paper describes a technique that improves protocol perfo...
Trevor Blackwell