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ICPP
2008
IEEE
15 years 4 months ago
Memory Access Scheduling Schemes for Systems with Multi-Core Processors
On systems with multi-core processors, the memory access scheduling scheme plays an important role not only in utilizing the limited memory bandwidth but also in balancing the pro...
Hongzhong Zheng, Jiang Lin, Zhao Zhang, Zhichun Zh...
IPPS
2006
IEEE
15 years 3 months ago
A distributed paging RAM grid system for wide-area memory sharing
Memory-intensive applications often suffer from the poor performance of disk swapping when memory is inadequate. Remote memory sharing schemes, which provide a remote memory that ...
Rui Chu, Nong Xiao, Yongzhen Zhuang, Yunhao Liu, X...
WWIC
2005
Springer
197views Communications» more  WWIC 2005»
15 years 3 months ago
Reducing Memory Fragmentation with Performance-Optimized Dynamic Memory Allocators in Network Applications
The needs for run-time data storage in modern wired and wireless network applications are increasing. Additionally, the nature of these applications is very dynamic, resulting in ...
Stylianos Mamagkakis, Christos Baloukas, David Ati...
77
Voted
ICCD
2001
IEEE
106views Hardware» more  ICCD 2001»
15 years 6 months ago
A Low-Power Cache Design for CalmRISCTM-Based Systems
Lowering power consumption in microprocessors, whether used in portables or not, has now become one of the most critical design concerns. On-chip cache memories tend to occupy dom...
Sangyeun Cho, Wooyoung Jung, Yongchun Kim, Seh-Woo...
CGO
2009
IEEE
15 years 4 months ago
Reducing Memory Ordering Overheads in Software Transactional Memory
—Most research into high-performance software transactional memory (STM) assumes that transactions will run on a processor with a relatively strict memory model, such as Total St...
Michael F. Spear, Maged M. Michael, Michael L. Sco...