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ISLPED
2009
ACM
211views Hardware» more  ISLPED 2009»
15 years 8 months ago
PPT: joint performance/power/thermal management of DRAM memory for multi-core systems
With the popularity of multi-core architecture, to sustain the memory demands from different cores, the memory system is expected to grow significantly in both speed and capacit...
Chung-Hsiang Lin, Chia-Lin Yang, Ku-Jei King
RTCSA
1997
IEEE
15 years 5 months ago
On memory protection in real-time OS for small embedded systems
Memory protection is an important OS feature for the reliability and safety of real-time control systems. In this paper, we study the feasibility of memory protection in small emb...
Shoji Suzuki, Kang G. Shin
EUROMICRO
1999
IEEE
15 years 5 months ago
A Selective Compressed Memory System by On-Line Data Decompressing
This research proposes a selective compressed memory system (SCMS) focusing on a compressed cache architecture, in which only data blocks with good compression efficiency are comp...
Jang-Soo Lee, Won-Kee Hong, Shin-Dug Kim
HPCA
2000
IEEE
15 years 5 months ago
Design of a Parallel Vector Access Unit for SDRAM Memory Systems
We are attacking the memory bottleneck by building a “smart” memory controller that improves effective memory bandwidth, bus utilization, and cache efficiency by letting appl...
Binu K. Mathew, Sally A. McKee, John B. Carter, Al...
DAC
2002
ACM
16 years 2 months ago
Automatic data migration for reducing energy consumption in multi-bank memory systems
An architectural solution to reducing memory energy consumption is to adopt a multi-bank memory system instead of a monolithic (single-bank) memory system. Some recent multi-bank ...
Victor De La Luz, Mahmut T. Kandemir, Ibrahim Kolc...