Cores in a chip-multiprocessor (CMP) system share multiple hardware resources in the memory subsystem. If resource sharing is unfair, some applications can be delayed significantl...
Many embedded systems contain resource constrained microcontrollers where applications, operating system components and device drivers reside within a single address space with no...
Ram Kumar, Akhilesh Singhania, Andrew Castner, Edd...
This paper addresses a purely software-based solution to the multiprocessor cache coherence problem by structuring an operating system to provide for the coherence of its own data...
This paper presents micro self-reconfigurable modular robotic systems using shape memory alloy (SMA). The system is designed so that various shapes can be autonomously formed by a ...
Chip Multiprocessor (CMP) memory systems suffer from the effects of destructive thread interference. This interference reduces performance predictability because it depends heavil...