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ASPLOS
2010
ACM
15 years 1 months ago
Fairness via source throttling: a configurable and high-performance fairness substrate for multi-core memory systems
Cores in a chip-multiprocessor (CMP) system share multiple hardware resources in the memory subsystem. If resource sharing is unfair, some applications can be delayed significantl...
Eiman Ebrahimi, Chang Joo Lee, Onur Mutlu, Yale N....
DAC
2007
ACM
15 years 10 months ago
A System For Coarse Grained Memory Protection In Tiny Embedded Processors
Many embedded systems contain resource constrained microcontrollers where applications, operating system components and device drivers reside within a single address space with no...
Ram Kumar, Akhilesh Singhania, Andrew Castner, Edd...
HICSS
1994
IEEE
139views Biometrics» more  HICSS 1994»
15 years 1 months ago
Operating System Support for Shared Memory Clusters
This paper addresses a purely software-based solution to the multiprocessor cache coherence problem by structuring an operating system to provide for the coherence of its own data...
Ronald L. Rockhold, James L. Peterson
DARS
2000
Springer
140views Robotics» more  DARS 2000»
15 years 1 months ago
Micro Self-Reconfigurable Robotic System using Shape Memory Alloy
This paper presents micro self-reconfigurable modular robotic systems using shape memory alloy (SMA). The system is designed so that various shapes can be autonomously formed by a ...
Eiichi Yoshida, Satoshi Murata, Shigeru Kokaji, Ko...
CF
2009
ACM
15 years 4 months ago
A light-weight fairness mechanism for chip multiprocessor memory systems
Chip Multiprocessor (CMP) memory systems suffer from the effects of destructive thread interference. This interference reduces performance predictability because it depends heavil...
Magnus Jahre, Lasse Natvig