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CASES
2007
ACM
15 years 5 months ago
A low power front-end for embedded processors using a block-aware instruction set
Energy, power, and area efficiency are critical design concerns for embedded processors. Much of the energy of a typical embedded processor is consumed in the front-end since inst...
Ahmad Zmily, Christos Kozyrakis
124
Voted
CF
2010
ACM
15 years 4 months ago
A communication infrastructure for a million processor machine
: The SpiNNaker machine is a massively parallel computing system, consisting of 1,000,000 cores. From one perspective, it has a place in Flynns' taxonomy: it is a straightforw...
Andrew D. Brown, Steve Furber, Jeff S. Reeve, Pete...
DAGSTUHL
2001
15 years 2 months ago
Visualization for the Mind's Eye
Software visualization has been almost exclusively tackled from the visual point of view; this means visualization occurs exclusively through the visual channel. This approach has ...
Nelson A. Baloian, Wolfram Luther
TDSC
2008
102views more  TDSC 2008»
15 years 1 months ago
Temporal Partitioning of Communication Resources in an Integrated Architecture
Integrated architectures in the automotive and avionic domain promise improved resource utilization and enable a better coordination of application subsystems compared to federated...
Roman Obermaisser
DSD
2010
IEEE
112views Hardware» more  DSD 2010»
15 years 3 days ago
Re-NUCA: Boosting CMP Performance Through Block Replication
— Chip Multiprocessor (CMP) systems have become the reference architecture for designing micro-processors, thanks to the improvements in semiconductor nanotechnology that have co...
Pierfrancesco Foglia, Cosimo Antonio Prete, Marco ...