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115
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ISCA
2006
IEEE
130views Hardware» more  ISCA 2006»
15 years 3 months ago
Area-Performance Trade-offs in Tiled Dataflow Architectures
: Tiled architectures, such as RAW, SmartMemories, TRIPS, and WaveScalar, promise to address several issues facing conventional processors, including complexity, wire-delay, and pe...
Steven Swanson, Andrew Putnam, Martha Mercaldi, Ke...
143
Voted
SOSP
2003
ACM
16 years 11 days ago
Upgrading transport protocols using untrusted mobile code
In this paper, we present STP, a system in which communicating end hosts use untrusted mobile code to remotely upgrade each other with the transport protocols that they use to com...
Parveen Patel, Andrew Whitaker, David Wetherall, J...
128
Voted
ACSAC
2009
IEEE
15 years 10 months ago
Scalable Web Content Attestation
—The web is a primary means of information sharing for most organizations and people. Currently, a recipient of web content knows nothing about the environment in which that info...
Thomas Moyer, Kevin R. B. Butler, Joshua Schiffman...
144
Voted
ANCS
2007
ACM
15 years 7 months ago
Ruler: high-speed packet matching and rewriting on NPUs
Programming specialized network processors (NPU) is inherently difficult. Unlike mainstream processors where architectural features such as out-of-order execution and caches hide ...
Tomas Hruby, Kees van Reeuwijk, Herbert Bos
ESAS
2004
Springer
15 years 8 months ago
Public Key Cryptography in Sensor Networks - Revisited
The common perception of public key cryptography is that it is complex, slow and power hungry, and as such not at all suitable for use in ultra-low power environments like wireless...
Gunnar Gaubatz, Jens-Peter Kaps, Berk Sunar