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ESAS
2004
Springer
15 years 5 months ago
Secure AES Hardware Module for Resource Constrained Devices
Abstract. Low power consumption, low gate count, and high throughput are standard design criteria for cryptographic coprocessors designated for resource constrained devices such as...
Elena Trichina, Tymur Korkishko
DAC
2005
ACM
16 years 17 days ago
Simulation models for side-channel information leaks
Small, embedded integrated circuits (ICs) such as smart cards are vulnerable to so-called side-channel attacks (SCAs). The attacker can gain information by monitoring the power co...
Kris Tiri, Ingrid Verbauwhede
ESORICS
2006
Springer
15 years 3 months ago
Timing-Sensitive Information Flow Analysis for Synchronous Systems
Timing side channels are a serious threat to the security of cryptographic algorithms. This paper presents a novel method for the timing-sensitive analysis of information flow in s...
Boris Köpf, David A. Basin
SBCCI
2005
ACM
136views VLSI» more  SBCCI 2005»
15 years 5 months ago
Current mask generation: a transistor level security against DPA attacks
The physical implementation of cryptographic algorithms may leak to some attacker security information by the side channel data, as power consumption, timing, temperature or elect...
Daniel Mesquita, Jean-Denis Techer, Lionel Torres,...
ISCA
2010
IEEE
284views Hardware» more  ISCA 2010»
15 years 4 months ago
Security refresh: prevent malicious wear-out and increase durability for phase-change memory with dynamically randomized address
Phase change memory (PCM) is an emerging memory technology for future computing systems. Compared to other non-volatile memory alternatives, PCM is more matured to production, and...
Nak Hee Seong, Dong Hyuk Woo, Hsien-Hsin S. Lee