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108
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IJES
2008
130views more  IJES 2008»
15 years 3 months ago
Deriving efficient control in Process Networks with Compaan/Laura
: At Leiden Embedded Research Center (LERC), we are building a tool chain called Compaan/Laura that allows us to map rapidly and efficiently signal processing applications written ...
Steven Derrien, Alexandru Turjan, Claudiu Zissules...
123
Voted
IEEEPACT
2009
IEEE
15 years 10 months ago
Oblivious Routing in On-Chip Bandwidth-Adaptive Networks
—Oblivious routing can be implemented on simple router hardware, but network performance suffers when routes become congested. Adaptive routing attempts to avoid hot spots by re-...
Myong Hyon Cho, Mieszko Lis, Keun Sup Shim, Michel...
126
Voted
ICCD
2004
IEEE
119views Hardware» more  ICCD 2004»
16 years 19 days ago
Simultaneous Scheduling, Binding and Layer Assignment for Synthesis of Vertically Integrated 3D Systems
Three dimensional vertically integrated systems allow active devices to be placed on multiple device layers. In recent years, a number of research efforts have addressed physical ...
Madhubanti Mukherjee, Ranga Vemuri
121
Voted
DATE
2010
IEEE
118views Hardware» more  DATE 2010»
15 years 2 months ago
Exploiting multiple switch libraries in topology synthesis of on-chip interconnection network
Abstract—On-chip interconnection network is a crucial design component in high-performance System-on-Chips (SoCs). Many of previous works have focused on the automation of its to...
Minje Jun, Sungroh Yoon, Eui-Young Chung
123
Voted
CHES
2007
Springer
187views Cryptology» more  CHES 2007»
15 years 10 months ago
PRESENT: An Ultra-Lightweight Block Cipher
With the establishment of the AES the need for new block ciphers has been greatly diminished; for almost all block cipher applications the AES is an excellent and preferred choice....
Andrey Bogdanov, Lars R. Knudsen, Gregor Leander, ...