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» Sign bit reduction encoding for low power applications
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ISCAS
2002
IEEE
125views Hardware» more  ISCAS 2002»
15 years 2 months ago
Switching activity estimation of finite state machines for low power synthesis
A technique for computing the switching activity of synchronous Finite State Machine (FSM) implementations including the influence of temporal correlation among the next state si...
Mikael Kerttu, Per Lindgren, Mitchell A. Thornton,...
CASES
2003
ACM
15 years 2 months ago
Power efficient encoding techniques for off-chip data buses
Reducing the power consumption of computing devices has gained a lot of attention recently. Many research works have focused on reducing power consumption in the off-chip buses as...
Dinesh C. Suresh, Banit Agrawal, Jun Yang 0002, Wa...
TC
2008
14 years 9 months ago
Low-Transition Test Pattern Generation for BIST-Based Applications
A low-transition test pattern generator, called the low-transition linear feedback shift register (LT-LFSR), is proposed to reduce the average and peak power of a circuit during te...
Mehrdad Nourani, Mohammad Tehranipoor, Nisar Ahmed
PATMOS
2007
Springer
15 years 3 months ago
Switching Activity Reduction of MAC-Based FIR Filters with Correlated Input Data
In this work we consider coefficient reordering for low power realization of FIR filters on fixed-point multiply-accumulate (MAC) based architectures, such as DSP processors. Com...
Oscar Gustafsson, Saeeid Tahmasbi Oskuii, Kenny Jo...
ISQED
2008
IEEE
150views Hardware» more  ISQED 2008»
15 years 4 months ago
Fundamental Data Retention Limits in SRAM Standby Experimental Results
SRAM leakage power dominates the total power of low duty-cycle applications, e.g., sensor nodes. Accordingly, leakage power reduction during data-retention in SRAM standby is ofte...
Animesh Kumar, Huifang Qin, Prakash Ishwar, Jan M....