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GLVLSI
2003
IEEE
202views VLSI» more  GLVLSI 2003»
15 years 10 months ago
System level design of real time face recognition architecture based on composite PCA
Design and implementation of a fast parallel architecture based on an improved principal component analysis (PCA) method called Composite PCA suitable for real-time face recogniti...
Rajkiran Gottumukkal, Vijayan K. Asari
GLVLSI
2003
IEEE
152views VLSI» more  GLVLSI 2003»
15 years 10 months ago
Dynamic single-rail self-timed logic structures for power efficient synchronous pipelined designs
The realization of fast datapaths in signal processing environments requires fastest, power efficient logic styles with synchronous behavior. This paper presents a method to combi...
Frank Grassert, Dirk Timmermann
ISVLSI
2003
IEEE
147views VLSI» more  ISVLSI 2003»
15 years 10 months ago
Automated Dynamic Memory Data Type Implementation Exploration and Optimization
The behavior of many algorithms is heavily determined by the input data. Furthermore, this often means that multiple and completely different execution paths can be followed, also...
Marc Leeman, Chantal Ykman-Couvreur, David Atienza...
EVOW
2003
Springer
15 years 10 months ago
GAME-HDL: Implementation of Evolutionary Algorithms Using Hardware Description Languages
Evolutionary Algorithms (EAs) have been proposed as a very powerful heuristic optimization technique to solve complex problems. Many case studies have shown that they work very eff...
Rolf Drechsler, Nicole Drechsler
215
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FPGA
2003
ACM
161views FPGA» more  FPGA 2003»
15 years 10 months ago
Implementation of BEE: a real-time large-scale hardware emulation engine
This paper describes the hardware implementation of a real-time, large-scale, multi-chip FPGA (Field Programmable Gate Array) based emulation engine with a capacity of 10 million ...
Chen Chang, Kimmo Kuusilinna, Brian C. Richards, R...
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