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DAC
2006
ACM
16 years 1 months ago
Use of C/C++ models for architecture exploration and verification of DSPs
Architectural decisions for DSP modules are often analyzed using high level C models. Such high-level explorations allow early examination of the algorithms and the architectural ...
David Brier, Raj S. Mitra
ISLPED
1996
ACM
93views Hardware» more  ISLPED 1996»
15 years 11 months ago
250-600 Mhz 12b digital filters in 0.8-0.25um Bulk and SOI CMOS technologies
This paper describes a family of high-speed Finite Impulse Response (FIR) digital filters that have been scaled across three generations of CMOS processes. The processes include c...
Lars E. Thon, Ghavam G. Shahidi, Werner Rausch, Ge...
FPL
2010
Springer
170views Hardware» more  FPL 2010»
15 years 5 months ago
IP Based Configurable SIMD Massively Parallel SoC
Significant advances in the field of configurable computing have enabled parallel processing within a single FieldProgrammable Gate Array (FPGA) chip. This paper presents the imple...
Mouna Baklouti, Mohamed Abid, Philippe Marquet, Je...
ICMI
2010
Springer
220views Biometrics» more  ICMI 2010»
15 years 4 months ago
Visual speech synthesis by modelling coarticulation dynamics using a non-parametric switching state-space model
We present a novel approach to speech-driven facial animation using a non-parametric switching state space model based on Gaussian processes. The model is an extension of the shar...
Salil Deena, Shaobo Hou, Aphrodite Galata
INTERSPEECH
2010
15 years 1 months ago
Nonlinear enhancement of onset for robust speech recognition
In this paper we present a novel algorithm called Suppression of Slowly-varying components and the Falling edge of the power envelope (SSF) to enhance spectral features for robust...
Chanwoo Kim, Richard M. Stern