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ICCAD
2010
IEEE
140views Hardware» more  ICCAD 2010»
15 years 4 months ago
Polynomial datapath optimization using constraint solving and formal modelling
For a variety of signal processing applications polynomials are implemented in circuits. Recent work on polynomial datapath optimization achieved significant reductions of hardware...
Finn Haedicke, Bijan Alizadeh, Görschwin Fey,...
ERSA
2009
147views Hardware» more  ERSA 2009»
15 years 4 months ago
Fault Avoidance in Medium-Grain Reconfigurable Hardware Architectures
Medium-grain reconfigurable hardware (MGRH) architectures represent a hybrid between the versatility of a field programmable gate array (FPGA) and the computational power of a cust...
Kylan Robinson, José G. Delgado-Frias
CORR
2010
Springer
152views Education» more  CORR 2010»
15 years 4 months ago
Fault Tolerant Variable Block Carry Skip Logic (VBCSL) using Parity Preserving Reversible Gates
Reversible logic design has become one of the promising research directions in low power dissipating circuit design in the past few years and has found its application in low power...
Md. Saiful Islam 0003, Muhammad Mahbubur Rahman, Z...
CORR
2011
Springer
189views Education» more  CORR 2011»
15 years 1 months ago
Volatility made observable at last
— The Cartier-Perrin theorem, which was published in 1995 and is expressed in the language of nonstandard analysis, permits, for the first time perhaps, a clear-cut mathematical...
Michel Fliess, Cédric Join, Fréd&eac...
TIT
2010
98views Education» more  TIT 2010»
15 years 1 months ago
QR decomposition of Laurent polynomial matrices sampled on the unit circle
Abstract--We consider Laurent polynomial (LP) matrices defined on the unit circle of the complex plane. QR decomposition of an LP matrix A(s) yields QR factors Q(s) and R(s) that, ...
Davide Cescato, Helmut Bölcskei