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EUROPAR
2008
Springer
14 years 11 months ago
Performance Implications of Cache Affinity on Multicore Processors
Cache affinity between a process and a processor is observed when the processor cache has accumulated some amount of the process state, i.e., data or instructions. Cache affinity i...
Vahid Kazempour, Alexandra Fedorova, Pouya Alagheb...
HPCA
2009
IEEE
15 years 10 months ago
Adaptive Spill-Receive for robust high-performance caching in CMPs
In a Chip Multi-Processor (CMP) with private caches, the last level cache is statically partitioned between all the cores. This prevents such CMPs from sharing cache capacity in r...
Moinuddin K. Qureshi
ICCD
2000
IEEE
94views Hardware» more  ICCD 2000»
15 years 6 months ago
A Selective Temporal and Aggressive Spatial Cache System Based on Time Interval
This research proposes a new cache system that can increase the effect by temporal and spatial locality by using only simple hardware control without any locality detection hardwa...
Jung-Hoon Lee, Jang-Soo Lee, Shin-Dug Kim
ISHPC
2003
Springer
15 years 2 months ago
Code and Data Transformations for Improving Shared Cache Performance on SMT Processors
Simultaneous multithreaded processors use shared on-chip caches, which yield better cost-performance ratios. Sharing a cache between simultaneously executing threads causes excessi...
Dimitrios S. Nikolopoulos
SIGMETRICS
2005
ACM
110views Hardware» more  SIGMETRICS 2005»
15 years 3 months ago
Empirical evaluation of multi-level buffer cache collaboration for storage systems
To bridge the increasing processor-disk performance gap, buffer caches are used in both storage clients (e.g. database systems) and storage servers to reduce the number of slow di...
Zhifeng Chen, Yan Zhang, Yuanyuan Zhou, Heidi Scot...