109 search results - page 18 / 22 » Simplifying Instruction Issue Logic in Superscalar Processor... |
MICRO
2006
IEEE
15 years 3 months ago
2006
IEEE
Instruction aggregation—the grouping of multiple operations into a single processing unit—is a technique that has recently been used to amplify the bandwidth and capacity of c...
HPCA
2005
IEEE
15 years 10 months ago
2005
IEEE
The use of large instruction windows coupled with aggressive out-oforder and prefetching capabilities has provided significant improvements in processor performance. In this paper...
89
Voted
ISCA
2002
IEEE
14 years 9 months ago
2002
IEEE
Traditional vector architectures have shown to be very effective for regular codes where the compiler can detect data-level parallelism. However, this SIMD parallelism is also pre...
ISCA
2003
IEEE
15 years 2 months ago
2003
IEEE
To achieve high instruction throughput, instruction schedulers must be capable of producing high-quality schedules that maximize functional unit utilization while at the same time...
86
Voted
ASAP
2005
IEEE
15 years 3 months ago
2005
IEEE
On public communication networks such as the Internet, data confidentiality can be provided by symmetric-key ciphers. One of the most common operations used in symmetric-key ciphe...