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FPGA
2008
ACM
145views FPGA» more  FPGA 2008»
14 years 11 months ago
FPGA interconnect design using logical effort
Logical effort (LE) is a linear technique for modelling the delay of a circuit in a technology independent manner. It offers the potential to simplify delay models for FPGAs and g...
Haile Yu, Yuk Hei Chan, Philip Heng Wai Leong
DKE
2002
137views more  DKE 2002»
14 years 9 months ago
Consistency of the static and dynamic components of object-oriented specifications
Object-Oriented modeling and design methodologies have been receiving a significant attention since they allow a quick and easy-to-gasp overview about a complex model. However, in...
Anna Formica, Heinz Frank
MICCAI
2003
Springer
15 years 10 months ago
A Biomechanical Model of the Liver for Reality-Based Haptic Feedback
: Biomechanical model of soft tissue for remote probing based on observed experimental data is critical for developing a reality-based model for minimally invasive surgical trainin...
Tie Hu, Jaydev P. Desai
PERCOM
2009
ACM
15 years 10 months ago
Multi-Event Handlers for Sensor-Driven Ubiquitous Computing Applications
Abstract--We propose an extension to the event-based programming model for sensor-driven ubiquitous computing applications. The extension consists of three abstractions: MultiEvent...
Sean Reilly
EMNLP
2006
14 years 11 months ago
Protein folding and chart parsing
How can proteins fold so quickly into their unique native structures? We show here that there is a natural analogy between parsing and the protein folding problem, and demonstrate...
Julia Hockenmaier, Aravind K. Joshi, Ken A. Dill