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» Simulated Annealing Based Temperature Aware Floorplanning
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JOLPE
2007
77views more  JOLPE 2007»
14 years 10 months ago
Simulated Annealing Based Temperature Aware Floorplanning
Yongkui Han, Israel Koren
ICCAD
2000
IEEE
94views Hardware» more  ICCAD 2000»
15 years 2 months ago
Corner Block List: An Effective and Efficient Topological Representation of Non-Slicing Floorplan
––In this paper, a corner block list — a new efficient topological representation for non-slicing floorplan is proposed with applications to VLSI floorplan and building block...
Xianlong Hong, Gang Huang, Yici Cai, Jiangchun Gu,...
ISQED
2005
IEEE
106views Hardware» more  ISQED 2005»
15 years 3 months ago
Thermal-Aware Floorplanning Using Genetic Algorithms
In this work, we present a genetic algorithm based thermal-aware floorplanning framework that aims at reducing hot spots and distributing temperature evenly across a chip while op...
Wei-Lun Hung, Yuan Xie, Narayanan Vijaykrishnan, C...
ICCAD
2007
IEEE
99views Hardware» more  ICCAD 2007»
15 years 7 months ago
Temperature aware microprocessor floorplanning considering application dependent power load
This paper studies microprocessor floorplanning considering thermal and throughput optimization. We first develop a stochastic heat diffusion model taking into account the appl...
Chunta Chu, Xinyi Zhang, Lei He, Tong Jing
ISPD
2005
ACM
143views Hardware» more  ISPD 2005»
15 years 3 months ago
Modern floorplanning based on fast simulated annealing
Tung-Chieh Chen, Yao-Wen Chang