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VLSID
1997
IEEE
98views VLSI» more  VLSID 1997»
15 years 3 months ago
Synthesis for Logical Initializability of Synchronous Finite State Machines
—Logical initializability is the property of a gate-level circuit whereby it can be driven to a unique start state when simulated by a three-valued (0, 1, ) simulator. In practic...
Montek Singh, Steven M. Nowick
TROB
2008
96views more  TROB 2008»
14 years 11 months ago
On Discrete-Time Pursuit-Evasion Games With Sensing Limitations
We address discrete-time pursuit-evasion games in the plane where every player has identical sensing and motion ranges restricted to closed discs of given sensing and stepping rad...
Shaunak Dattaprasad Bopardikar, Francesco Bullo, J...
75
Voted
ICPR
2000
IEEE
16 years 5 days ago
Estimation of the Location of Joint Points of Human Body from Successive Volume Data
Recognizing structure of human body is important for modeling human motion. Human body is usually represented as an articulate model, which consists of the rigid parts and the joi...
Masaaki Iiyama, Yoshinari Kameda, Michihiko Minoh
73
Voted
RAS
1998
145views more  RAS 1998»
14 years 10 months ago
Coordinated path planning for multiple robots
We present a new approach to the multi-robot path planning problem, where a number of robots are to change their positions through feasible motions in the same static environment....
Petr Svestka, Mark H. Overmars
DAC
2003
ACM
15 years 4 months ago
Realizable RLCK circuit crunching
Reduction of an extracted netlist is an important pre-processing step for techniques such as model order reduction in the design and analysis of VLSI circuits. This paper describe...
Chirayu S. Amin, Masud H. Chowdhury, Yehea I. Isma...