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VLSID
2008
IEEE
166views VLSI» more  VLSID 2008»
16 years 2 days ago
Exploring the Processor and ISA Design for Wireless Sensor Network Applications
Power consumption, physical size, and architecture design of sensor node processors have been the focus of sensor network research in the architecture community. What lies at the ...
Shashidhar Mysore, Banit Agrawal, Frederic T. Chon...
HPCA
2005
IEEE
16 years 1 days ago
Predicting Inter-Thread Cache Contention on a Chip Multi-Processor Architecture
This paper studies the impact of L2 cache sharing on threads that simultaneously share the cache, on a Chip Multi-Processor (CMP) architecture. Cache sharing impacts threads non-u...
Dhruba Chandra, Fei Guo, Seongbeom Kim, Yan Solihi...
MOBIHOC
2005
ACM
15 years 11 months ago
TCP over multihop 802.11 networks: issues and performance enhancement
Analyzing TCP operation over 802.11 multihop ad hoc networks involves a cross-layer study. In this work, we investigate the effect of congestion and MAC contention on the interact...
Kitae Nahm, Ahmed Helmy, C. C. Jay Kuo
EUROSYS
2008
ACM
15 years 8 months ago
Modeling viral economies for digital media
Financial efficiency is the premier performance measure for most systems. Existing economic ecosystems for distribution of multimedia leave a lot to be desired: client-server plat...
Shan He, Renan G. Cattelan, Darko Kirovski
GECCO
2009
Springer
15 years 6 months ago
Multiobjectivization for parameter estimation: a case-study on the segment polarity network of drosophila
Mathematical modeling for gene regulative networks (GRNs) provides an effective tool for hypothesis testing in biology. A necessary step in setting up such models is the estimati...
Tim Hohm, Eckart Zitzler