657 search results - page 128 / 132 » Simulating Student Programmers |
PPOPP
2003
ACM
15 years 2 months ago
2003
ACM
In an intelligent memory architecture, the main memory of a computer is enhanced with many simple processors. The result is a highly-parallel, heterogeneous machine that is able t...
EPIA
2003
Springer
15 years 2 months ago
2003
Springer
Abstract. This paper describes jcc, an integration of the timed default concurrent constraint programming framework [16] (Timed Default cc) into JAVA [7]. jcc is intended for use i...
FPGA
2001
ACM
15 years 2 months ago
2001
ACM
The routing architecture of an FPGA consists of the length of the wires, the type of switch used to connect wires (buffered, unbuffered, fast or slow) and the topology of the inte...
80
Voted
CODES
1999
IEEE
15 years 1 months ago
1999
IEEE
o much higher levels of abstraction than today's design practices, which are usually at the level of synthesizable RTL for custom hardware or Instruction Set Simulator (ISS) f...
ISCA
1999
IEEE
15 years 1 months ago
1999
IEEE
Sequential consistency (SC) is the simplest programming interface for shared-memory systems but imposes program order among all memory operations, possibly precluding high perform...