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ASPLOS
1998
ACM
15 years 10 months ago
Fast Out-Of-Order Processor Simulation Using Memoization
Our new out-of-order processor simulator, FastSim, uses two innovations to speed up simulation 8–15 times (vs. Wisconsin SimpleScalar) with no loss in simulation accuracy. First...
Eric Schnarr, James R. Larus
CAMAD
2006
IEEE
15 years 8 months ago
Nessi: a python network simulator for fast protocol development
A new and simple network simulator Nessi is described in this paper. While other simulators focus on minimizing the simulation time, Nessi tries to minimize the development time an...
Jérôme Vernez, Jürgen Ehrensberg...
BMCBI
2005
92views more  BMCBI 2005»
15 years 6 months ago
A restraint molecular dynamics and simulated annealing approach for protein homology modeling utilizing mean angles
Background: We have developed the program PERMOL for semi-automated homology modeling of proteins. It is based on restrained molecular dynamics using a simulated annealing protoco...
Andreas Möglich, Daniel Weinfurtner, Till Mau...
CODES
2005
IEEE
15 years 12 months ago
Memory access optimizations in instruction-set simulators
Design of programmable processors and embedded applications requires instruction-set simulators for early exploration and validation of candidate architectures. Interpretive simul...
Mehrdad Reshadi, Prabhat Mishra
ICCAD
1999
IEEE
77views Hardware» more  ICCAD 1999»
15 years 10 months ago
Symbolic functional and timing verification of transistor-level circuits
We introduce a new method of verifying the timing of custom CMOS circuits. Due to the exponential number of patterns required, traditional simulation methods are unable to exhaust...
Clayton B. McDonald, Randal E. Bryant