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CODES
2007
IEEE
16 years 2 days ago
HW/SW co-design for Esterel processing
We present a co-synthesis approach that accelerates reactive software processing by moving the calculation of complex expressions into external combinational hardware. The startin...
Sascha Gädtke, Claus Traulsen, Reinhard von H...
149
Voted
ISQED
2007
IEEE
141views Hardware» more  ISQED 2007»
16 years 15 hour ago
OPC-Friendly Bus Driven Floorplanning
In this paper, we address the interconnect-driven floorplanning problem that integrates OPC-friendly bus assignment with floorplanning. Buses consist of a number of horizontal/v...
Hua Xiang, Liang Deng, Li-Da Huang, Martin D. F. W...
SP
2007
IEEE
148views Security Privacy» more  SP 2007»
16 years 7 hour ago
DSSS-Based Flow Marking Technique for Invisible Traceback
Law enforcement agencies need the ability to conduct electronic surveillance to combat crime, terrorism, or other malicious activities exploiting the Internet. However, the prolif...
Wei Yu, Xinwen Fu, Steve Graham, Dong Xuan, Wei Zh...
GLOBECOM
2007
IEEE
15 years 12 months ago
Path Diversity in Packet Switched Networks: Performance Analysis and Rate Allocation
—Path diversity works by setting up multiple parallel connections between the end points using the topological path redundancy of the network. In this paper, Forward Error Correc...
Shervan Fashandi, Shahab Oveis Gharan, Amir K. Kha...
EMSOFT
2007
Springer
15 years 12 months ago
Optimal task placement to improve cache performance
Most recent embedded systems use caches to improve their average performance. Current timing analyses are able to compute safe timing guarantees for these systems, if tasks are ru...
Gernot Gebhard, Sebastian Altmeyer