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159
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FCCM
2005
IEEE
15 years 10 months ago
2005
IEEE
The CLA-EC is a model obtained by combining the concepts of cellular learning automata and evolutionary algorithms. The parallel structure of the CLA-EC makes it suitable for hard...
150
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FPGA
2008
ACM
15 years 6 months ago
2008
ACM
Logical effort (LE) is a linear technique for modelling the delay of a circuit in a technology independent manner. It offers the potential to simplify delay models for FPGAs and g...
140
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COMPLEXITY
2010
15 years 2 months ago
2010
In this paper we introduce the Partition Task problem class along with a complexity measure to evaluate its instances and a performance measure to quantify the ability of a system...
121
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ICASSP
2011
IEEE
14 years 8 months ago
2011
IEEE
In this paper, a new direction-of-arrival (DOA) estimation technique applicable to partly-calibrated arrays (PCAs) composed of arbitrary subarrays with unknown subarray displaceme...
153
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GECCO
2010
Springer
15 years 7 months ago
2010
Springer
Developing dispatching rules for manufacturing systems is a tedious process, which is time- and cost-consuming. Since there is no good general rule for different scenarios and ob...