173 search results - page 32 / 35 » Simulation Optimization of Air Traffic Delay Cost |
ISCAS
2008
IEEE
15 years 4 months ago
2008
IEEE
—In this paper a new ADC architecture of flash type is proposed. This proposed N-bit flash ADC replaces the (2N -1)-toN encoder with two (2N/2 -1)-to-(N/2) encoders to accomplish...
MICRO
2008
IEEE
15 years 4 months ago
2008
IEEE
Processors progressively age during their service life due to normal workload activity. Such aging results in gradually slower circuits. Anticipating this fact, designers add timi...
CODES
2005
IEEE
15 years 3 months ago
2005
IEEE
High performance microprocessors are designed with generalpurpose applications in mind. When it comes to embedded applications, these architectures typically perform controlintens...
106
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BROADNETS
2006
IEEE
14 years 11 months ago
2006
IEEE
Routing protocols developed for ad hoc wireless networks use broadcast transmission to either discover a route or disseminate information. More specifically, reactive routing proto...
WSC
1997
14 years 11 months ago
1997
Optimistic parallel discrete event simulation (PDES) uses a state history trail to support rollback. State saving strategies range from making a complete copy of a model’s state...