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82
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DAC
2003
ACM
15 years 2 months ago
Low-power design methodology for an on-chip bus with adaptive bandwidth capability
This paper describes a low-power design methodology for a bus architecture based on hybrid current/voltage mode signaling for deep sub-micrometer on-chip interconnects that achiev...
Rizwan Bashirullah, Wentai Liu, Ralph K. Cavin III
74
Voted
ICC
2007
IEEE
15 years 4 months ago
Space-Time Coded Systems with Joint Transmit and Receive Antenna Selection
— This paper studies performance of space-time coded (STC) systems with joint transmit and receive antenna selection over multiple input multiple output (MIMO) flat and frequenc...
Tansal Gucluoglu, Tolga M. Duman
63
Voted
ISCAS
2007
IEEE
103views Hardware» more  ISCAS 2007»
15 years 3 months ago
Hopf-Type Intermediate-Scale Bifurcation in Single-Stage Power-Factor-Correction Power Supplies
— This paper reports intermediate-scale instability in a single-stage power-factor-correction (PFC) power supply that employs a cascade configuration of a boost stage operating ...
Dong Dai, Shengnan Li, Xikui Ma, Chi K. Michael Ts...
SIGMETRICS
1990
ACM
129views Hardware» more  SIGMETRICS 1990»
15 years 1 months ago
An Analytical Model of Multistage Interconnection Networks
Multiprocessors require an interconnection network to connect processors with memory modules. The performance of the interconnection network can have a large effect upon overall s...
Darryl L. Willick, Derek L. Eager
DAC
1995
ACM
15 years 1 months ago
Power Estimation in Sequential Circuits
Abstract A new method for power estimation in sequential circuits is presented that is based on a statistical estimation technique. By applying randomly generated input sequences t...
Farid N. Najm, Shashank Goel, Ibrahim N. Hajj