17740 search results - page 3368 / 3548 » Simulation Using Orchestration |
163
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HPCA
2005
IEEE
16 years 6 months ago
2005
IEEE
This paper studies the impact of L2 cache sharing on threads that simultaneously share the cache, on a Chip Multi-Processor (CMP) architecture. Cache sharing impacts threads non-u...
184
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HPCA
2005
IEEE
16 years 6 months ago
2005
IEEE
With the increasing concern of the security on high performance multiprocessor enterprise servers, more and more effort is being invested into defending against various kinds of a...
243
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HPCA
2004
IEEE
16 years 6 months ago
2004
IEEE
Recent research suggests that there are large variations in a cache's spatial usage, both within and across programs. Unfortunately, conventional caches typically employ fixe...
179
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HPCA
2001
IEEE
16 years 6 months ago
2001
IEEE
Mispredicted branches and loads that miss in the cache cause the majority of retirement stalls experienced by sequential processors; we call these critical instructions. Despite t...
164
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CHI
2004
ACM
16 years 6 months ago
2004
ACM
This chapter introduces the concept of multi-modal interaction and our findings related to the development of biomedical applications for two different projection modalities: virtu...