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ECRTS
2002
IEEE
15 years 4 months ago
Fully Automatic Worst-Case Execution Time Analysis for Matlab/Simulink Models
In today’s technical world (e.g., in the automotive industry), more and more purely mechanical components get replaced by electro-mechanical ones. Thus the size and complexity o...
Raimund Kirner, Roland Lang, Gerald Freiberger, Pe...
ISCAS
2002
IEEE
154views Hardware» more  ISCAS 2002»
15 years 4 months ago
Architectural approaches to reduce leakage energy in caches
In this paper, we present two methods to reduce leakage energy by dynamically resizing the cache during program execution. The first method monitors the miss rate of the individua...
S. H. Tadas, C. Chakrabarti
ICIAR
2009
Springer
15 years 4 months ago
VizDraw: A Platform to Convert Online Hand-Drawn Graphics into Computer Graphics
Abstract. With the adoption of tablet-based data entry devices, there is considerable interest in methods for converting hand-drawn sketches of flow charts, graphs and block diagr...
Akshaya Kumar Mishra, Justin A. Eichel, Paul W. Fi...
DATE
2000
IEEE
142views Hardware» more  DATE 2000»
15 years 3 months ago
Power and Delay Reduction via Simultaneous Logic and Placement Optimization in FPGAs
Traditional FPGA design flows have treated logic synthesis and physical design as separate steps. With the recent advances in technology, the lack of information on the physical ...
Balakrishna Kumthekar, Fabio Somenzi
RTA
1993
Springer
15 years 3 months ago
Redundancy Criteria for Constrained Completion
This paper studies completion in the case of equations with constraints consisting of rstorder formulae over equations, disequations, and an irreducibility predicate. We present s...
Christopher Lynch, Wayne Snyder