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CODES
2008
IEEE
15 years 5 months ago
Static analysis for fast and accurate design space exploration of caches
Application-specific system-on-chip platforms create the opportunity to customize the cache configuration for optimal performance with minimal chip estate. Simulation, in partic...
Yun Liang, Tulika Mitra
CORR
2010
Springer
88views Education» more  CORR 2010»
14 years 11 months ago
Kinematic modelling of a 3-axis NC machine tool in linear and circular interpolation
Machining time is a major performance criterion when it comes to high speed machining. CAM software can help in estimating that time for a given strategy. But in practice, CAM pro...
Xavier Pessoles, Yann Landon, Walter Rubio
DAC
2008
ACM
16 years 10 days ago
DeFer: deferred decision making enabled fixed-outline floorplanner
In this paper, we present DeFer -- a fast, high-quality and nonstochastic fixed-outline floorplanning algorithm. DeFer generates a non-slicing floorplan by compacting a slicing fl...
Jackey Z. Yan, Chris Chu
RECONFIG
2008
IEEE
225views VLSI» more  RECONFIG 2008»
15 years 5 months ago
A Hardware Filesystem Implementation for High-Speed Secondary Storage
Platform FPGAs are capable of hosting entire Linuxbased systems including standard peripherals, integrated network interface cards and even disk controllers on a single chip. File...
Ashwin A. Mendon, Ron Sass
ACSAC
2007
IEEE
15 years 5 months ago
HoneyIM: Fast Detection and Suppression of Instant Messaging Malware in Enterprise-Like Networks
Instant messaging (IM) has been one of most frequently used malware attack vectors due to its popularity. Distinct from other malware, it is straightforward for IM malware to fin...
Mengjun Xie, Zhenyu Wu, Haining Wang