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» Simulation data exchange (SDX) implementation and use
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DSD
2010
IEEE
144views Hardware» more  DSD 2010»
14 years 10 months ago
On-chip Scan-Based Test Strategy for a Dependable Many-Core Processor Using a NoC as a Test Access Mechanism
—Periodic on-chip scan-based tests have to be applied to a many-core processor SoC to improve its dependability. An infrastructural IP module has been designed and incorporated i...
Xiao Zhang, Hans G. Kerkhoff, Bart Vermeulen
WCW
2004
Springer
15 years 3 months ago
Towards Informed Web Content Delivery
Abstract. A wide range of techniques have been proposed, implemented, and even standardized for improving the performance of Web content delivery. However, previous work has found ...
Leeann Bent, Michael Rabinovich, Geoffrey M. Voelk...
SPAA
2010
ACM
15 years 2 months ago
Simplifying concurrent algorithms by exploiting hardware transactional memory
We explore the potential of hardware transactional memory (HTM) to improve concurrent algorithms. We illustrate a number of use cases in which HTM enables significantly simpler c...
Dave Dice, Yossi Lev, Virendra J. Marathe, Mark Mo...
VTS
1997
IEEE
86views Hardware» more  VTS 1997»
15 years 2 months ago
Methods to reduce test application time for accumulator-based self-test
Accumulators based on addition or subtraction can be used as test pattern generators. Some circuits, however, require long test lengths if the parameters of the accumulator are no...
Albrecht P. Stroele, Frank Mayer
PE
2007
Springer
112views Optimization» more  PE 2007»
14 years 9 months ago
Multicast inference of temporal loss characteristics
Multicast-based inference has been proposed as a method of estimating average loss rates of internal network links, using end-to-end loss measurements of probes sent over a multic...
Vijay Arya, Nick G. Duffield, Darryl Veitch