Sciweavers

1028 search results - page 145 / 206
» Simulation in the future
Sort
View
ISCA
2002
IEEE
95views Hardware» more  ISCA 2002»
15 years 2 months ago
An Instruction Set and Microarchitecture for Instruction Level Distributed Processing
An instruction set architecture (ISA) suitable for future microprocessor design constraints is proposed. The ISA has hierarchical register files with a small number of accumulator...
Ho-Seop Kim, James E. Smith
ISSS
2002
IEEE
194views Hardware» more  ISSS 2002»
15 years 2 months ago
Managing Dynamic Concurrent Tasks in Embedded Real-Time Multimedia Systems
This paper addresses the problem of mapping an application, which is highly dynamic in the future, onto a heterogeneous multiprocessor platform in an energy efficient way. A two-p...
Rudy Lauwereins, Chun Wong, Paul Marchal, Johan Vo...
ISSS
2002
IEEE
151views Hardware» more  ISSS 2002»
15 years 2 months ago
Tuning of Loop Cache Architectures to Programs in Embedded System Design
Adding a small loop cache to a microprocessor has been shown to reduce average instruction fetch energy for various sets of embedded system applications. With the advent of core-b...
Frank Vahid, Susan Cotterell
MICRO
2002
IEEE
114views Hardware» more  MICRO 2002»
15 years 2 months ago
Characterizing and predicting value degree of use
A value’s degree of use—the number of dynamic uses of that value—provides the most essential information needed to optimize its communication. We present simulation results ...
J. Adam Butts, Gurindar S. Sohi
ICN
2009
Springer
15 years 2 months ago
Trainspotting, a WSN-Based Train Integrity System
In contrast to classic train protection systems where most of the safety measures are built into the rail infrastructure, future versions of the European railway safety system ERT...
Hans Scholten, Roel Westenberg, Manfred Schoemaker