Sciweavers

181 search results - page 7 / 37
» Simulation of High-Performance Memory Allocators
Sort
View
CODES
2007
IEEE
15 years 6 months ago
Simultaneous synthesis of buses, data mapping and memory allocation for MPSoC
Heterogeneous multiprocessors are emerging as the dominant implementation approach to embedded multiprocessor systems. In addition to having processing elements suited to the targ...
Brett H. Meyer, Donald E. Thomas
MICRO
2009
IEEE
137views Hardware» more  MICRO 2009»
15 years 6 months ago
ESKIMO: Energy savings using Semantic Knowledge of Inconsequential Memory Occupancy for DRAM subsystem
Dynamic Random Access Memory (DRAM) is used as the bulk of the main memory in most computing systems and its energy and power consumption has become a first-class design considera...
Ciji Isen, Lizy Kurian John
CLUSTER
2000
IEEE
15 years 4 months ago
Distributed Processor Allocation in Multicomputers
Current processor allocation techniques for multicomputers are based on centralized front-end based algorithms. As a result, the applied strategies are usually restricted to stati...
Rose Rose, Hans-Ulrich Heiss, Philippe Olivier Ale...
CCR
2004
153views more  CCR 2004»
14 years 11 months ago
Tree bitmap: hardware/software IP lookups with incremental updates
IP address lookup is challenging for high performance routers because it requires a longest matching prefix at speeds of up to 10 Gbps (OC-192). Existing solutions have poor updat...
Will Eatherton, George Varghese, Zubin Dittia
RTAS
2006
IEEE
15 years 5 months ago
Adaptive Allocation of Software and Hardware Real-Time Tasks for FPGA-based Embedded Systems
Operating systems for reconfigurable devices enable the development of embedded systems where software tasks, running on a CPU, can coexist with hardware tasks running on a recon...
Rodolfo Pellizzoni, Marco Caccamo