1304 search results - page 102 / 261 » Simulation of Soliton Circuits |
CHES
2004
Springer
15 years 3 months ago
2004
Springer
Dual-rail encoding, return-to-spacer protocol and hazard-free logic can be used to resist differential power analysis attacks by making the power consumption independent of process...
DAC
1999
ACM
15 years 2 months ago
1999
ACM
We present a new approach for estimation and optimization of the average stand-by power dissipation in large MOS digital circuits. To overcome the complexity of state dependence i...
EAAI
2010
14 years 10 months ago
2010
This paper addresses the problem of fault detection and isolation in railway track circuits. A track circuit can be considered as a large-scale system composed of a series of trim...
ICCAD
2010
IEEE
14 years 8 months ago
2010
IEEE
1In this paper, we will present an effective layout method for analog circuits. We consider symmetry constraint, common centroid constraint, device merging and device clustering du...
88
Voted
DATE
2008
IEEE
15 years 4 months ago
2008
IEEE
In the last decade, the focus of fault-tolerance methods has tended towards circuit level modifications, such as transistor resizing, and away from expensive system level redunda...