1304 search results - page 113 / 261 » Simulation of Soliton Circuits |
PADS
2003
ACM
15 years 3 months ago
2003
ACM
There is a wide-spread usage of hardware design languages(HDL) to speed up the time-to-market for the design of modern digital systems. Verification engineers can simulate hardwa...
DAC
2009
ACM
15 years 11 months ago
2009
ACM
Logic simulation is a critical component of the design tool flow in modern hardware development efforts. It is used widely ? from high-level descriptions down to gate-level ones ?...
78
Voted
SAMOS
2004
Springer
15 years 3 months ago
2004
Springer
In this paper we present a new approach for generating high-speed optimized event-driven register transfer level (RTL) compiled simulators. The generation of the simulators is part...
ICCAD
1996
IEEE
15 years 2 months ago
1996
IEEE
Functional simulation is the most widely used method for design verification. At various levels of abstraction, e.g., behavioral, register-transfer level and gate level, the design...
94
Voted
DAC
2010
ACM
15 years 1 months ago
2010
ACM
Fault simulation is essential in test generation, design for test and reliability assessment of integrated circuits. Reliability analysis and the simulation of self-test structure...