1304 search results - page 118 / 261 » Simulation of Soliton Circuits |
81
Voted
ISCAS
2005
IEEE
15 years 3 months ago
2005
IEEE
Inductance effects of on-chip interconnects have become more and more significant in today’s high-speed digital circuits, especially for global interconnects such as signal buse...
63
Voted
DATE
2002
IEEE
15 years 3 months ago
2002
IEEE
The relative tolerances for interconnect and device parameter variations have not scaled with feature sizes which have brought about significant performance variability. As we sca...
83
Voted
ENGL
2008
14 years 10 months ago
2008
This paper discusses novel dedicated hardware architecture for hybrid optimization based on Genetic algorithm (GA) and Simulated Annealing (SA). The proposed architecture achieves ...
107
Voted
TCAD
2008
14 years 10 months ago
2008
The relatively poor scaling of interconnect in modern digital circuits necessitates a number of design optimizations, which must typically be iterated several times to meet the spe...
80
Voted
ASIACRYPT
2006
Springer
15 years 1 months ago
2006
Springer
Non-interactive zero-knowledge proofs play an essential role in many cryptographic protocols. We suggest several NIZK proof systems based on prime order groups with a bilinear map...