1304 search results - page 234 / 261 » Simulation of Soliton Circuits |
ASYNC
2002
IEEE
15 years 7 months ago
2002
IEEE
We present a method for synchronizing pausible clocks in GALS (Globally Asynchronous, Locally Synchronous) systems. In contrast to most conventional GALS schemes the method is not...
104
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ASYNC
2002
IEEE
15 years 7 months ago
2002
IEEE
Reliable, low-latency channel communication between independent clock domains may be achieved using a combination of clock pausing techniques, self-calibrating delay lines and an ...
104
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DFT
2002
IEEE
15 years 7 months ago
2002
IEEE
We propose an algorithm for gate-delay fault diagnosis. It is based on the inject-and-evaluate paradigm [1], in which the fault site(s) are predicted through a series of injection...
111
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ISCA
2002
IEEE
15 years 6 months ago
2002
IEEE
Increasing the number of instruction queue (IQ) entries in a dynamically scheduled processor exposes more instruction-level parallelism, leading to higher performance. However, in...
105
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ISSS
2002
IEEE
15 years 6 months ago
2002
IEEE
We have fabricated a Chip Multiprocessor prototype code-named Merlot to proof our novel speculative multithreading architecture. On Merlot, multiple threads provide wider issue wi...