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» Simulation of Soliton Circuits
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ENTCS
2006
131views more  ENTCS 2006»
14 years 10 months ago
The Case for Analog Circuit Verification
The traditional approach to validate analog circuits is to utilize extensive SPICElevel simulations. The main challenge of this approach is knowing when all important corner cases...
Chris J. Myers, Reid R. Harrison, David Walter, Ni...
DSD
2005
IEEE
105views Hardware» more  DSD 2005»
15 years 3 months ago
Improved Fault Emulation for Synchronous Sequential Circuits
Current paper presents new alternatives for accelerating the task of fault simulation for sequential circuits by hardware emulation on FPGA. Fault simulation is an important subta...
Jaan Raik, Peeter Ellervee, Valentin Tihhomirov, R...
IPPS
1998
IEEE
15 years 2 months ago
Meta-heuristics for Circuit Partitioning in Parallel Test Generation
In this communication Simulated Annealing and Genetic Algorithms, are applied to the graph partitioning problem. These techniques mimic processes in statistical mechanics and biol...
Consolación Gil, Julio Ortega, Antonio F. D...
ISCAS
2005
IEEE
140views Hardware» more  ISCAS 2005»
15 years 3 months ago
Low energy asynchronous architectures
: Asynchronous circuits are often presented as a means of achieving low power operation. We investigate their suitability for low-energy applications, where long battery life and d...
Ilya Obridko, Ran Ginosar
DATE
2010
IEEE
139views Hardware» more  DATE 2010»
14 years 6 months ago
A general mathematical model of probabilistic ripple-carry adders
Probabilistic CMOS is considered a promising technology for future generations of computing devices. By embracing possibly incorrect calculations, the technology makes it possible ...
Mark S. K. Lau, Keck Voon Ling, Yun-Chung Chu, Aru...