1304 search results - page 35 / 261 » Simulation of Soliton Circuits |
DATE
2002
IEEE
15 years 2 months ago
2002
IEEE
Due to the increasing operating frequencies and the manner in which the corresponding integrated circuits and systems must be designed, the extraction, modeling and simulation of ...
ITC
1999
IEEE
15 years 2 months ago
1999
IEEE
Resistive bridging faults in combinational CMOS circuits are studied in this work. Circuit-level models are ed to voltage behavior for use in voltage-level fault simulation and te...
ICCAD
2001
IEEE
15 years 6 months ago
2001
IEEE
We present a methodology for generating black-box timing models for full-custom transistor-level CMOS circuits. Our approach utilizes transistor-level ternary symbolic timing simu...
ICCAD
1991
IEEE
15 years 1 months ago
1991
IEEE
The program TRANALYZE generates a gate-level representation of an MOS transistor circuit. The resulting model contains only four-valued unit and zero delay logic primitives, suita...
DAC
2006
ACM
15 years 3 months ago
2006
ACM
With the advent of carbon nanotube technology, evaluating circuit and system performance using these devices is becoming extremely important. In this paper, we propose a quasi-ana...