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IJCNN
2007
IEEE
15 years 4 months ago
Spiking and Bursting Firing Patterns of a Compact VLSI Cortical Neuron Circuit
—The paper presents a silicon neuron circuit that mimics the behaviour of known classes of biological neurons. The circuit has been designed in a 0.35µm CMOS technology. The fir...
Jayawan H. B. Wijekoon, Piotr Dudek
ISCAS
2006
IEEE
90views Hardware» more  ISCAS 2006»
15 years 3 months ago
A novel ternary more, less and equality circuit using recharged semi-floating gate devices
— This paper presents a novel Ternary More, Less and Equality (MLE) Circuit implemented with Recharged SemiFloating Gate Transistors. The circuit is a ternary application, and te...
Henning Gundersen, Yngvar Berg
DFT
2003
IEEE
106views VLSI» more  DFT 2003»
15 years 3 months ago
Techniques for Transient Fault Sensitivity Analysis and Reduction in VLSI Circuits
Transient faults in VLSI circuits could lead to disastrous consequences. With technology scaling, circuits are becoming increasingly vulnerable to transient faults. This papers pr...
Atul Maheshwari, Israel Koren, Wayne Burleson
ITC
2003
IEEE
162views Hardware» more  ITC 2003»
15 years 3 months ago
Concurrent Error Detection in Linear Analog Circuits Using State Estimation
We present a novel methodology for concurrent error detection in linear analog circuits. We develop a rigorous theory that yields an error detection circuit of size that is, in ge...
Haralampos-G. D. Stratigopoulos, Yiorgos Makris
ICCAD
1999
IEEE
67views Hardware» more  ICCAD 1999»
15 years 2 months ago
Realizable reduction for RC interconnect circuits
Interconnect reduction is an important step in the design and analysis of complex interconnects found in present-day integrated circuits. This paper presents techniques for obtain...
Anirudh Devgan, Peter R. O'Brien