—The paper presents a silicon neuron circuit that mimics the behaviour of known classes of biological neurons. The circuit has been designed in a 0.35µm CMOS technology. The fir...
— This paper presents a novel Ternary More, Less and Equality (MLE) Circuit implemented with Recharged SemiFloating Gate Transistors. The circuit is a ternary application, and te...
Transient faults in VLSI circuits could lead to disastrous consequences. With technology scaling, circuits are becoming increasingly vulnerable to transient faults. This papers pr...
We present a novel methodology for concurrent error detection in linear analog circuits. We develop a rigorous theory that yields an error detection circuit of size that is, in ge...
Interconnect reduction is an important step in the design and analysis of complex interconnects found in present-day integrated circuits. This paper presents techniques for obtain...