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» Simulation of Soliton Circuits
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EH
2003
IEEE
116views Hardware» more  EH 2003»
15 years 3 months ago
Silicon Validation of Evolution-Designed Circuits
No silicon fabrication and characterization of circuits with topologies designed by evolution has been done before, leaving open questions about the feasibility of the evolutionar...
Adrian Stoica, Ricardo Salem Zebulum, Xin Guo, Did...
DFT
1997
IEEE
108views VLSI» more  DFT 1997»
15 years 2 months ago
Generation and Verification of Tests for Analogue Circuits Subject to Process Parameter Deviations
The paper presents a test pattern generation and fault simulation methodology for the detection of catastrophic faults in analogue circuits. The test methodology chosen for evalua...
Stephen J. Spinks, Chris D. Chalk, Ian M. Bell, Ma...
ASIAMS
2008
IEEE
14 years 10 months ago
A Noise Elimination Procedure for Printed Circuit Board Inspection System
Image difference operation is frequently used in automated printed circuit board (PCB) inspection system as well as in many other image processing applications. During the impleme...
Zuwairie Ibrahim, Noor Khafifah Khalid, Ismail Ibr...
VLSID
2006
IEEE
87views VLSI» more  VLSID 2006»
15 years 4 months ago
Evaluation of Non-Quasi-Static Effects during SEU in Deep-Submicron MOS Devices and Circuits
In this paper, for the first time, we analyze non-quasistatic (NQS) effects during single-event upsets (SEUs) in deep-submicron (DSM) MOS devices, using extensive 2D device, BSIM...
Palkesh Jain, D. Vinay Kumar, J. M. Vasi, Mahesh B...
DATE
2003
IEEE
130views Hardware» more  DATE 2003»
15 years 3 months ago
Noise Macromodel for Radio Frequency Integrated Circuits
† Noise performance is a critical analog and RF circuit design constraint, and can impact the selection of the IC system-level architecture. It is therefore imperative that some ...
Yang Xu, Xin Li, Peng Li, Lawrence T. Pileggi