No silicon fabrication and characterization of circuits with topologies designed by evolution has been done before, leaving open questions about the feasibility of the evolutionar...
Adrian Stoica, Ricardo Salem Zebulum, Xin Guo, Did...
The paper presents a test pattern generation and fault simulation methodology for the detection of catastrophic faults in analogue circuits. The test methodology chosen for evalua...
Stephen J. Spinks, Chris D. Chalk, Ian M. Bell, Ma...
Image difference operation is frequently used in automated printed circuit board (PCB) inspection system as well as in many other image processing applications. During the impleme...
Zuwairie Ibrahim, Noor Khafifah Khalid, Ismail Ibr...
In this paper, for the first time, we analyze non-quasistatic (NQS) effects during single-event upsets (SEUs) in deep-submicron (DSM) MOS devices, using extensive 2D device, BSIM...
Palkesh Jain, D. Vinay Kumar, J. M. Vasi, Mahesh B...
† Noise performance is a critical analog and RF circuit design constraint, and can impact the selection of the IC system-level architecture. It is therefore imperative that some ...