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» Simulation of Soliton Circuits
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ICCAD
2006
IEEE
165views Hardware» more  ICCAD 2006»
15 years 6 months ago
A fast block structure preserving model order reduction for inverse inductance circuits
Most existing RCL−1 circuit reductions stamp inverse inductance L−1 elements by a second-order nodal analysis (NA). The NA formulation uses nodal voltage variables and describ...
Hao Yu, Yiyu Shi, Lei He, David Smart
ASPDAC
2005
ACM
101views Hardware» more  ASPDAC 2005»
14 years 12 months ago
A wideband hierarchical circuit reduction for massively coupled interconnects
— We develop a realizable circuit reduction to generate the interconnect macro-model for parasitic estimation in wideband applications. The inductance is represented by VPEC (vec...
Hao Yu, Lei He, Zhenyu Qi, Sheldon X.-D. Tan
VLSID
2005
IEEE
223views VLSI» more  VLSID 2005»
15 years 10 months ago
A New CMOS Current Conveyors Based Translinear Loop for Log-Domain Circuit Design
A novel topology for Translinear (TL) loops comprising of CMOS Second Generation Current Conveyors (CC-II) and diodes is proposed. The proposed methodology opens a new paradigm to...
Debashis Dutta, Wouter A. Serdijn, Swapna Banerjee...
ISCAS
2007
IEEE
89views Hardware» more  ISCAS 2007»
15 years 4 months ago
Switching Phase States of Chaotic Circuits Coupled by Time-Varying Resistor
— In this study, two chaotic circuits coupled by a time-varying resistor are investigated. We assume that the timevarying resistor is realized by switching a positive and a negat...
Yoko Uwate, Yoshifumi Nishio
ISCAS
2003
IEEE
99views Hardware» more  ISCAS 2003»
15 years 3 months ago
Optimization of shield structures in analog integrated circuits
The effect of shield structures for local wirings of analog integrated circuits on crosstalk is determined by electromagnetic simulation. The crosstalk of parallel wirings is redu...
Ken Yamamoto, Minoru Fujishima, Koichiro Hoh