1304 search results - page 63 / 261 » Simulation of Soliton Circuits |
PATMOS
2004
Springer
15 years 3 months ago
2004
Springer
A full-adder implemented by combining branch-based logic and pass-gate logic is presented in this contribution. A comparison between this proposed full-adder (named BBL PT) and its...
CATA
2007
14 years 11 months ago
2007
In this paper, Simulated Evolution based goodness attributes are incorporated into Tabu Search and Genetic Algorithms to enhance performance as compared to canonical strategies. I...
DSD
2010
IEEE
14 years 8 months ago
2010
IEEE
— A method how to improve the coverage of single faults in combinational circuits is proposed. The method is based on Concurrent Error Detection, but uses a fault simulation to f...
DATE
2003
IEEE
15 years 3 months ago
2003
IEEE
A new numerical technique for periodic small signal analysis based on harmonic balance method is proposed. Special-purpose numerical procedures based on Krylov subspace methods ar...
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DAC
2004
ACM
15 years 11 months ago
2004
ACM
Parametric representations used for symbolic simulation of circuits usually use BDDs. After a few steps of symbolic simulation, state set representation is converted from one para...