1304 search results - page 66 / 261 » Simulation of Soliton Circuits |
ICCAD
2006
IEEE
15 years 6 months ago
2006
IEEE
— Trajectory-based methods offer an attractive methodology for automated, on-demand generation of macromodels for custom circuits. These models are generated by sampling the stat...
ISQED
2009
IEEE
15 years 4 months ago
2009
IEEE
In this paper challenges observed in 65nm technology for circuits utilizing subthreshold region operation are presented. Different circuits are analyzed and simulated for ultra lo...
SOCC
2008
IEEE
15 years 4 months ago
2008
IEEE
In this paper a new ultra low power SRAM cell is proposed. In the proposed SRAM topology, additional circuitry has been added to a standard 6T-SRAM cell to improve the static nois...
VLSID
2008
IEEE
15 years 10 months ago
2008
IEEE
Negative Bias Temperature Instability (NBTI) has been identified as a major and critical reliability issue for PMOS devices in nano-scale designs. It manifests as a negative thres...
ISQED
2007
IEEE
15 years 4 months ago
2007
IEEE
According to the current trend of increasing variations in process technologies and thus in performance, the conservative worst-case design will not work since design margins can ...